<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:content="http://purl.org/rss/1.0/modules/content/"><channel><title>Ethernet on Paul Fleischmann</title><link>https://paul-fleischmann.com/en/tags/ethernet/</link><description>Recent content in Ethernet on Paul Fleischmann</description><generator>Hugo</generator><language>en</language><lastBuildDate>Mon, 08 Jun 2026 00:00:00 +0000</lastBuildDate><atom:link href="https://paul-fleischmann.com/en/tags/ethernet/index.xml" rel="self" type="application/rss+xml"/><item><title>EthTrcv Hardware Deep Dive — The Physical Interfaces of the PHY Chip</title><link>https://paul-fleischmann.com/en/autosar/ethtrcv/ethtrcv-hardware-deep-dive/</link><pubDate>Mon, 08 Jun 2026 00:00:00 +0000</pubDate><guid>https://paul-fleischmann.com/en/autosar/ethtrcv/ethtrcv-hardware-deep-dive/</guid><description>A hardware deep dive for software developers: what happens at PCB level when EthTrcv is configured — MAC interfaces, MDIO bus, line side, and the path of a frame through the PHY.</description></item></channel></rss>