EthTrcv — Master/Slave Configuration for 100BASE-T1

The Hardware Deep Dive in this series already showed this: 100BASE-T1 transmits and receives simultaneously on the same twisted wire pair.

With 100BASE-TX the situation is simple: each side has its own transmit pair with its own clock. There is no need to agree on a shared timing reference — each side just sends using its own free-running oscillator.

That does not work with 100BASE-T1. Because both sides transmit and receive simultaneously on the same pair, the PHY has to separate its own transmit signal from the receive signal — via echo cancellation, as described in the hardware post. That echo cancellation is an adaptive digital filter, and adaptive filters only work reliably when transmitter and receiver run on the same clock frequency.

Two independent, free-running crystals on either end of the cable inevitably drift apart slightly — even with tight tolerances (e.g. ±50 ppm). For a unidirectional line like 100BASE-TX this is not a problem, because each transmission direction has its own clock domain. On 100BASE-T1, however, this frequency difference would systematically disrupt the echo-cancellation filter: the filter implicitly assumes that its own transmit signal runs at exactly the same frequency as the one it is trying to subtract out of the receive signal.

The solution: one side of the link — the Master — generates the transmit clock from its own free-running crystal oscillator. The other side — the Slave — synchronizes to that clock by recovering it from the received signal (clock recovery) and using that same recovered clock for its own transmit side as well (loop timing).

Without this role split, every PHY would constantly have to compensate for a frequency difference relative to its link partner. In practice that shows up as elastic-buffer overflow or underflow (the buffer used to absorb clock differences fills up or runs dry) and as degraded echo-cancellation performance — in the worst case, a link that comes up briefly and then drops sporadically.

Every 100BASE-T1 segment connects exactly two participants: one Master and one Slave. Unlike classic 10BASE-T coax or CAN, 100BASE-T1 has no multidrop segment and no shared bus with multiple participants — every physical connection is strictly point-to-point.

Because a single segment only ever knows two participants, larger vehicle networks are built exclusively by chaining point-to-point segments together through switches (EthSwt). Topologically the result is usually a star around a central switch or gateway, occasionally multi-tier (a tree topology across several cascaded switches).

Each individual segment (switch port to end device) is, on its own, an ordinary point-to-point connection with a fixed master/slave assignment — the star topology only emerges from the number of switch ports, not from any property of 100BASE-T1 itself.

As described in the Hardware Deep Dive, PHY configuration runs over the MDIO bus. The master/slave role is no special case here — it is simply another bit or register field that EthTrcv_Init sets while bringing up the PHY.

Importantly, this configuration is static on a 100BASE-T1 PHY — it is written once during init and stays unchanged for the lifetime of the link. Unlike some copper Gigabit PHYs (see below), there is no negotiation mechanism that changes this configuration at runtime.

The TJA1100 (100BASE-T1, RMII interface) is one of the most widely deployed 100BASE-T1 PHYs in the field. Its master/slave role can be set two ways:

The BCM89810 is another widely used 100BASE-T1 PHY, also with an RMII interface on the MAC side. The underlying principle is identical to the TJA1100: a dedicated configuration bit in the register space controls the role, with a hardware-pin-set default that can be overridden via MDIO.

A detail that surprises many people: the AUTOSAR standard does in fact define a unified parameter for connection negotiation (and thereby the master/slave role) on 100BASE-T1 in the generic EthTrcv configuration container — EthTrcvConnNeg ([ECUC_EthTrcv_00025]). It lives in the EthTrcvConfig container, right alongside parameters like EthTrcvDuplexMode or EthTrcvSpeed, and is specified as an EcucEnumerationParamDef with the following literals:

The specification also notes an important dependency: if EthTrcvEnablePLCA = TRUE, EthTrcvConnNeg must be set to TRCV_CONN_NEG_NONE. If instead EthTrcvPhysLayerType is configured as TRCV_PHYS_LAYER_TYPE_10BASE_T1S and PLCA is not enabled, EthTrcvConnNeg must be explicitly configured as master or slave — because 10BASE-T1S can run with either PLCA or classic CSMA/CD media access. For 100BASE-T1 (without PLCA), only TRCV_CONN_NEG_MASTER and TRCV_CONN_NEG_SLAVE are relevant.

A simplified but realistic example of how the standard parameter is set in ARXML:

The parameter name (EthTrcvConnNeg) and the enum value range (TRCV_CONN_NEG_MASTER / TRCV_CONN_NEG_SLAVE / TRCV_CONN_NEG_AUTO / TRCV_CONN_NEG_NONE) are defined in the AUTOSAR standard document itself ([ECUC_EthTrcv_00025]) — not a vendor-specific detail, but part of the EthTrcv base model.

Classic 1000BASE-T (copper, IEEE 802.3ab, Clause 40) negotiates the master/slave role by default via auto-negotiation: both sides exchange capabilities, and a defined resolve algorithm decides who becomes Master and who becomes Slave — with the option to force either side into a fixed role manually (Master-Slave Manual Config Enable).

100BASE-T1 (IEEE 802.3bw) does not have this concept. There is no auto-negotiation mechanism that negotiates the role at runtime. The role is configured exclusively statically — via pin strapping and/or software override over MDIO, as described above.

At first glance, the absence of auto-negotiation looks like a step backwards. For the automotive use case, however, it is a deliberate design decision with clear advantages:

If both ends of a 100BASE-T1 segment are configured as Master (or both as Slave), no link comes up at all. There is no error signal, no error message in the classic sense — the PHY simply reports "no link" permanently, exactly as it would with a broken cable or missing power supply.

That exact symptom pattern — "everything else checks out, but there is no link" — is what makes the failure tricky: the cable, the connectors, the power supply, and even MDIO communication with the PHY itself all work fine, because the master/slave configuration was successfully written over MDIO. It is just the wrong value.