Part 1 of this series only briefly touched on cascaded switch topologies in zonal architectures. This post covers the two concrete AUTOSAR mechanisms behind that: port-specific hardware timestamps and clock synchronization between directly connected switches.

The EthSwt_SetMgmtInfo mechanism, which plays a role here, was correctly scoped during the fact-check for issue #145: it serves port-specific frame handling for timestamp metadata — not a general configuration channel (see this series' management-frames post for the full distinction).

Switch management support: the basis for EthTSyn

Chapter 7.1.7.3 of the SWS describes switch management support as functionality that lets you control an Ethernet frame’s switch-port- specific ingress/egress handling as well as a port-specific timestamp. Per the SWS, this is "essential for other BSW modules, in particular `EthTSyn`", which needs port-specific information for a time synchronization or path-delay measurement frame.

The associated API group (active when EthSwtManagementSupportApi is TRUE): EthSwt_EthRxProcessFrame, EthSwt_EthRxFinishedIndication, EthSwt_EthTxAdaptBufferLength, EthSwt_EthTxPrepareFrame, EthSwt_SetMgmtInfo, EthSwt_EthTxProcessFrame, EthSwt_EthTxFinishedIndication.

An important implementation detail: per the SWS, EthSwt_EthTxProcessFrame and EthSwt_EthTxFinishedIndication return immediately if EthSwt_SetMgmtInfo wasn’t called for this frame beforehand — so the management info must be set before the actual transmit processing.

Hardware timestamps per port

Hardware timestamps are enabled per port via EthSwtPortTimeStampSupport. At runtime, EthSwt_PortEnableTimeStamp(PortIdx) controls the actual activation — provided EthSwtPortTimeStampSupport is set to TRUE for that port.

Clock synchronization between cascaded switches

Some switch chips can synchronize their internal clock directly with a neighboring switch when connected via an uplink port. If EthSwtClockSynchronizationSupport is enabled, the path delay between the two connected uplink ports no longer needs to be measured separately — the clocks are already in sync.

Backbone switch                          Zonal switch
┌─────────────────────┐   Uplink port   ┌─────────────────────┐
│  internal clock        │◄───────────────►│  internal clock        │
│  EthSwtClockSync...     │  clocks already │  EthSwtClockSync...     │
│  Support = TRUE          │  in sync         │  Support = TRUE          │
└─────────────────────┘                  └─────────────────────┘
        ▲                                          ▲
        │ EthSwtPortTimeStampSupport            EthSwtPortTimeStampSupport
        │ only on non-uplink ports               only on non-uplink ports
   external ports                              external ports
 (cameras, ECUs, ...)                        (cameras, ECUs, ...)

The two configuration rules in detail

The SWS states two complementary constraints:

  • EthSwtPortTimeStampSupport may be TRUE if EthSwtClockSynchronizationSupport is disabled (the classic case: a single switch, timestamps needed at every port)

  • EthSwtPortTimeStampSupport may also be TRUE if EthSwtClockSynchronizationSupport is enabled — but not for ports with EthSwtPortRole = ETHSWT_UP_LINK_PORT. Uplink ports are deliberately excluded from path-delay compensation in this case, since clock synchronization already makes the measurement unnecessary there

Practical rule of thumb: if clock synchronization between two cascaded switches is active, the uplink port itself no longer needs its own timestamp — only the external ports (to cameras, zonal ECUs, etc.) on both switches still need EthSwtPortTimeStampSupport = TRUE.

Summary

AspectKey takeaway

Switch management support

Port-specific frame handling for EthTSyn, not a configuration channel — SetMgmtInfo must be set before EthTxProcessFrame

Hardware timestamps

Per port via EthSwtPortTimeStampSupport + EthSwt_PortEnableTimeStamp

Clock synchronization

EthSwtClockSynchronizationSupport avoids path-delay measurement between cascaded switches over uplink ports

Interaction

Timestamps and clock synchronization sensibly exclude each other on uplink ports